Sr . Principal Verification Engr

Job Summary:

We are looking for an experienced Senior SoC Verification Lead with 15+ years of expertise in pre-silicon SoC verification. The ideal candidate will have strong hands-on experience in UVM, SystemVerilog, Verilog, and C, and a proven track record of leading end-to-end SoC verification, developing robust verification environments, and driving silicon readiness

Job Qualification:

• At least 15 years of experience in SoC verification.
• Strong expertise in UVM, Verilog, System Verilog, C
• Defined complex pre-silicon verification environments
• Developed direct and constrained-random stimulus for SoC
• Expert in analyzing RTL code, functional, assertion coverage results
• Good knowledge of digital design
• Awareness of best practices adopted in verification

Job Responsibilities:

• Lead pre-silicon SoC verification activities end-to-end
• Define and execute SoC-level verification strategies and plans
• Develop and maintain UVM based verification environments.
• Create verification plans from architectural requirements
• Low power intent verification using CPF, UPF
• Netlist verification
• Hardware-software verification
• Plan and track the verification tasks and ensure silicon tape out readiness.
• Defines tasks for team members to meet the project timelines
• Lead and mentor verification engineers
• Drive verification methodology improvements
• Collaborate with architecture, RTL design and firmware teams.

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